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CALIFORNIA MICRO DEVICES
PACDN005
P/ACTIVE SCHOTTKY DIODE HIGH SPEED BUS TERMINATOR
Features 36 integrated diodes in a single package offers 18 channel, dual rail clamping action Provides proper bus termination independent of external line or card loading conditions Schottky diode technology; excellent forward voltage and reverse recovery characteristics 24-pin QSOP package saves board space and eases layout in space critical bus termination applications versus discrete approaches Applications PCI v2.1 Bus Termination for Intel-based Pentium(R) and Pentium Pro systems Local high speed bus termination for all popular RISC and embedded microprocessor applications High speed memory and SDRAM Memory Bus Termination
Refer to AP-201 Termination Application Note for further information.
Product Description Note: CMDs P/Active DN005 Schottky Diode High Speed Bus Terminator is an upgraded version of the original PDN001 or IPEC DN001 Diode Array. PACDN005 provides minimized lead inductance and parasitic capacitive effects (with added ground pins), improved forward voltage and crosstalk attributes, and excellent termination performance characteristics at high data transmission rates. The PACDN005 is recommended for all new designs. Reflections on high speed data lines lead to undershoot and overshoot disturbances which may result in improper system operation. Resistor terminations, when used to terminate high speed data lines, increase power consumption and degrade output (high) levels resulting in reduced noise immunity. Schottky diode termination is the best overall solution for applications in which power consumption and noise immunity are critical considerations. CMDs P/Active DN005 Schottky Diode High Speed Bus Terminator is specifically designed to minimize undershoot/overshoot disturbances caused by reflection noise on high speed bus lines such as v2.1 66MHz PCI buses, all varieties of RISC embedded processor/control local buses, synchronous DRAM, and other high speed memory bus termination applications. This highly integrated Schottky diode network provides very effective termination performance for high speed data lines under variable loading conditions. The device supports up to 18 terminated lines per package each of which can be simultaneously clamped to both ground and power supply rail. A typical bus termination application will utilize three PAC DN005 devices to replace approximately 50 conventional Schottky diode pairs; thus providing significant reductions in component and assembly costs, improvements in manufacturing efficiency and reliability, and savings in allocated board area for spacecritical designs.
SCHEMATIC CONFIGURATION
VDD VDD GND
24
23
22
21
20
19
18
17
16
15
14
13
1
GND
2
3
4
5
6
GND
7
8
9
10
11
12
VDD
(c)2000 California Micro Devices Corp. All rights reserved. 2/00
215 Topaz Street, Milpitas, California 95035
Tel: (408) 263-3214
Fax: (408) 263-7846
www.calmicro.com
1
CALIFORNIA MICRO DEVICES
STANDARD SPECIFICATIONS Symbol VDD Iclamp Tstg
PACDN005
ABSOLUTE MAXIMUM RATINGS Parameter Supply Voltage Channel clamp current (continuous) Operating Temperature Storage Temperature Package Power Rating
Rating -0.3V to +7V 50mA 0OC to 70OC -65 OC to +150OC 1.00W, max.
The absolute maximum ratings are limiting values, to be applied individually, beyond which the device may be permanently damaged. Functional operation under any of these conditions is not guaranteed. Exposing the device to its absolute maximum rating may affect its reliability.
DIODE CHARACTERISTICS (TA = 0O to 70OC) Parameter Conditions Min Diode foward voltage To VDD IF = 16 mA 0.55V IF = 50 mA From GND IF = 16 mA 0.50V IF = 50 mA Reverse Recovery Time (See Note 1) IF = 50mA (estimated) Channel leakage 0 VIN VDD Input Capacitance f = 1 MHz, VIN = 2.5V, TA = 25OC, VDD = 5.0V ESD Protection MIL-STD-883, Method 3015 4KV
Typ 0.55V 0.70V 0.50V 0.65V 0.1A 5pF
Max 0.70V 0.90V 0.65V 0.85V <400pS 5A
Pins 24 24 Note 1:
Package
STANDARD PART ORDERING INFORMATION Ordering Part Number Style Tubes Tape & Reel QSOP PACDN005Q/T PACDN005Q/R SOIC Wide PACDN005S/T PACDN005S/R
Part Marking PACDN005Q PACDN005S
The test circuit depicts the Schottky diodes in their typical application. The impact of a reverse recovery time is measured using a narrow pulse with 670- pS rise and fall times. This pulse propagates down a 60 cm, 54 ohm strip line fabricated on a multi-layer, controlled impedance printed circuit board. In testing the ground clamp diode, the negative going edge of the pulse causes a reflection which forces the diode under test to become forward biased. The positive going edge of the pulse attempts to pull this diode out of forward conduction. A reverse recovery phenomenon would cause a delay between the known arrival time of the positive edge and the observed edge due to the time it takes for the forward biased diode to actually become reversed biased. In this measurement, however, there is no observable difference and therefore no delay for the positive edge due to the presence of the diode. The waveforms are adjusted to individually test the ground and VDD clamps. See test circuit.
VDD ABT16244A Pulse Generator Z0, L Diode under test
Test Circuit. Line length, pulse width and duty cycle are selected such as that only one reflection is involved in the measurement.
(c)2000 California Micro Devices Corp. All rights reserved.
2
215 Topaz Street, Milpitas, California 95035
Tel: (408) 263-3214
Fax: (408) 263-7846
www.calmicro.com
2/00

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